The rapid increase in the volume of communications traffic in optical transmission in recent years has created demand for technologies that allow high-quality data communications in high-speed transmission at about 100 Gbps that is largely affected by optical dispersion. One of the technologies is the digital coherent technology. An optical communication device to which the digital coherent technology is applied uses, for example, the dual polarization-quadrature phase shift keying (DP-QPSK) modulation scheme, for which standards are being developed by Optical Internetworking Forum (OIF). This optical communication device includes an optical transmitter that multiplexes a signal into an orthogonal polarization state, and an optical receiver that receives the multiplexed signal. The optical receiver includes a local light source such as a laser diode (LD) that emits light having substantially the same wavelength as that of received signal light. The optical receiver mixes the output light from the local light source with the received signal light to convert (perform coherent detection) the light into electrical signals of two (X, Y) polarizations each having IQ components. The optical receiver analog-to-digital (AD) converts the resulting signals, performs distortion correction and error correction, and outputs the signals to the outside of the optical receiver as a 100 Gbps information signal.
Patent Document 1: Japanese Laid-open Patent Publication No. 2010-93656
Patent Document 2: Japanese Laid-open Patent Publication No. 2010-80665
Patent Document 3: Japanese Laid-open Patent Publication No. 2008-109562
In optical coherent transmission performed by the above-described optical communication device, the following problem occurs. The receiver of the optical communication device optimizes, before AD conversion, electrical signals to be input to analog digital converters (ADCs) to be in the dynamic range of the ADCs so that an error rate in decoding the signals is reduced. When the receiver reduces the level of analog signals to be input to the ADCs for optimization, gain of clock components is reduced that are extracted from input signals in a digital signal processor arranged in the subsequent stage. A reduction in gain of clock components makes it difficult to achieve synchronization and, together with time-varying impairments and characteristics variations between lanes, it may cause decoding errors. An increase in error rate in the receiver inhibits improvement in optical transmission quality. When the receiver increases the level of the analog signals to maintain the gain of clock components, the amplitude of the analog signals exceeds the dynamic range of the ADCs. Consequently, the digital signal processor is unable to extract data components from digital signals after AD conversion.